发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To remove a programmable I/O required when a data terminal is used for data transfer, to remove the complexity of circuit connection and to contract the constitution of a system by using an address terminal in stead of a data terminal of a CPU. CONSTITUTION:The addresses of a ROM and a RAM are assigned to ''0000H''- ''47FFH'', and when the CPU accesses ''0000H''-''47FFH'', it is supposed that a high level signal is outputted to a terminal A15. Since the terminal A15 is not connected to any one of the ROM and the RAM, the address accessed by the CPU is determined by the contents of terminals A0-A14. Namely, the CPU accesses ''8000H''-''C7FFH'' apparently, but the terminal A15 is not actually concerned in the address accessed by the CPU. Thereby, the terminal A15 is not concerned in the accessed addresses of the ROM and the RAM even if the terminal A15 is set up to any level, high or low level, so that the terminal A15 can be set up to an optional level and can be used as a data transfer line.
申请公布号 JPS60239853(A) 申请公布日期 1985.11.28
申请号 JP19840096916 申请日期 1984.05.15
申请人 SUWA SEIKOSHA KK 发明人 KOIKE KUNIO;IWASAKI SHIYUNJI;HAMA YUUJI
分类号 G06F13/38;G06F13/14;G06F13/16 主分类号 G06F13/38
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