| 摘要 |
PURPOSE:To encode an input picture of two channels by a single coding circuit with high efficiency by comparing the phase of the 2nd vertical synchronizing signal with that of the 1st vertical synchronizing signal, retarding the 2nd digital picture signal to make the phases coincident and outputting the result with time division multiplex at each other picture element. CONSTITUTION:The 1st input picture signal PS1 and the 2nd input picture signal PS2 being asynchronous but having identical vertical synchronizing frequency are inputted respectively from input terminals IN1 and IN2. A delay circuit DC retards the 2nd digital picture signal DPS2 and outputs the 2nd digital picture signal DPS2' whose line number and picture element address are coincident to the 1st digital picture element image signal DPS1. A signal converting circuit SC applies time devision multiplex at each other picture element to output a multiplex digital picture signal MDPS. Then a coding circuit CC transmits a coded data CDD to a transmission line from an output terminal OUT.
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