发明名称
摘要 PURPOSE:To ensure a highly effective transmission of information, by adapting such a system that all the bits of information comprising the data bits and parity bits can be turned into the data. CONSTITUTION:A decoding circuit 3 detects the Y field of the A-th information and then transmits the output signal if the Y field has a display of 7 for instance. This output signal is supplied to a gate circuit 4 along with the X field of the A-th information, i.e., the parity of the (A+1)th information. The circuit 4 supplies the (A+1)th parity to a parity checking circuit 5. At the same time, 8 bits of the (A+1)th information within a memory 1 are also supplied to the circuit 5 to receive a parity check with both signals. In case 7 bits of the ordinary 8 bits are used as the data with the rest 1 bit used as the parity, the circuit 3 has no actuation to give no operation to the circuit 4. Accordingly the circuit 5 reads the ordinary 7-bit data plus its parity out of the memory 1 to perform a parity check.
申请公布号 JPS6053889(B2) 申请公布日期 1985.11.27
申请号 JP19800090854 申请日期 1980.07.03
申请人 FUJITSU LTD 发明人 BABA YASUO
分类号 H04L1/00;G06F11/10 主分类号 H04L1/00
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