发明名称 |
Detection circuit for detecting synchronous and asynchronous states in a phase-locked loop circuit |
摘要 |
The output of a phase comparator in the PLL of the data reproduction unit is filtered to remove low frequency components which may be due to record eccentricity. The filtered output is then rectified and integrated, with the level of the integrated signal determining whether the PLL should be operated in a broad or narrow band state.
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申请公布号 |
US4555679(A) |
申请公布日期 |
1985.11.26 |
申请号 |
US19830496733 |
申请日期 |
1983.05.20 |
申请人 |
PIONEER VIDEO CORPORATION |
发明人 |
KATSUYAMA, HITOSHI |
分类号 |
H04N5/95;G11B20/02;H03L7/095;H03L7/107;H04N9/89;(IPC1-7):H03L7/00;H03L7/10 |
主分类号 |
H04N5/95 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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