| 摘要 |
PURPOSE:To improve the reliability of information by arranging detection probabilities of respective bits in increasing or decreasing order in each block consisting of (b) bits except check bit as to a (t+1)-pile error of a (t)-pile error control circuit. CONSTITUTION:For example, PCM codes a1...a8 and a9...a16 of two samples as information data are stored in a memory 9. In this case, low-order digit bits are arrayed to right from high-order digit bits a1 and a9 of the samples and specific parity check bits P1...P6 are generated by exclusive OR circuits 11-1...11-6 to store the data in a memory 10. In such a case, the circuits 11-1...11-6 are so constituted as to perform the error detection and correction of the high-order digit bits a1 and a9 more precisely than other bits and the detection rate of bits with high detection rates to a (t)-pile error is increased even to a (t+1)-pile error.
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