| 摘要 |
<p>PURPOSE:To reduce electric power consumption and occupying area of a ROM circuit by supplying the decoder output from a NAND circuit via an inverter to the gates of the ROM cells of a NOR circuit so that the flow of through-current to the ROM cells is prevented. CONSTITUTION:The output from a decoder part 20 of the NAND circuit provided with N type FET01-0i for logical gates between P, N type FETs 21 and 22 for precharging and switching is supplied via the inverter 31 to the gates of the ROM cells of the N type FETs 311-3MN of the NOR circuit. The floating capacity between the FETs 21 and 01 of the output line of such decoder 20 is slight as compared with the floating capacity of the output lines 410-4N0 of the ROM. The FETs 311-3MN are turned off even if the FETs 21, 41-4N are simultaneously turned on and the flow of the through-current is thus prevented. As a result, the need for providing a transfer gate between the ROM cells and the ground is eliminated and the electric power consumption and occupying area of the ROM circuit are reduced.</p> |
