| 摘要 |
PURPOSE:To shorten the data retrieval time by providing data latch circuits whose number is larger than the number of address busses, and retrieving data from a memory having a capacity larger than the memory capacity which can be accessed directly by address busses. CONSTITUTION:A data latch circuit 25 having bits whose number is larger than the number of bits of an address bus 22 is provided on a data bus 23. A preset counter part 26 which has the same number of bits as the latch circuit 25 and can be preset and is counted up for every read request of a CPU21 is provided on the data bus 23 also. Before retrieval is started, the last address is set to the latch circuit 25, and the start address is set to the preset counter part 26. Thus, the address of a ROM31 is incremented automatically only by issue of a read request signal from the CPU21, and data in addresses are outputted to the data bus, and an end interruption signal is transmitted from a comparator 27 to the CPU2 when data in the last address is read.
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