发明名称 PIN ACCESS CIRCUIT FOR PACKAGE TESTING MACHINE
摘要 PURPOSE:To omit the time for collating a data under execution of a test, and to shorten the inspecting time by reading an output signal from an object to be tested, simultaneously with the timing for setting the object to be tested to a prescribed condition, and storing successively a read data. CONSTITUTION:A pattern storage part 1 stores an input/output indicating signal S-1 for determining the input and the output of a test pin 2, data signal S-2 and a read signal S-3. The signals S-1, S-2 pass through a pattern transfer part 3 by the timing of a test clock S-4, and are sent out to a signal control part 4 and a signal read part 5. When the signal S-1 designates an output by seeing from a package testing machine, the signal S-2 is outputted as the output value to an object to be tested, through the pin 2, and when said signal S-1 designates an input, said signal S-2 is not outputted to the pin 2 but sent out to the read part 5 an expected value. In that case, the signal S-3 from the object to be tested passes through the pin 2 and the control part 4 and is sent out to the read part 5, and also stored in the storage part 1 by the timing of a read clock S-5. In such a way, a high speed access can be executed.
申请公布号 JPS60233575(A) 申请公布日期 1985.11.20
申请号 JP19840089694 申请日期 1984.05.04
申请人 NIPPON DENKI KK 发明人 NAKAYAMA AKIHISA
分类号 G01R31/20 主分类号 G01R31/20
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