| 摘要 |
<p>PURPOSE:To utilize effectively the hardware resources of a CPU and therefore to attain the high-speed transfer of data of large capacity, by using a microaddress counter MAC, temporary work register TWR, and a selector, etc. CONSTITUTION:When no DMA transfer request signal is supplied from an input terminal DRQ309-1 for request of large-capacity and high-speed data transfer DMA, etc., a DMA control circuit 308 controls a selector 310 and connects an internal data bus 103 to an MAC302. Thus the normal data processing is carried out via the register selection signal given from a fixed control memory 314 and a TWR306-1, etc. When a DMA transfer request signal is supplied to the circuit 308 from the terminal 309-1, the selector 310 is switched toward a DMA control bus 308-1. Thus the DMA data processing is carried out by the control signals given from the MAC302 and the memory 314 via the TWR306-1. Thus the DMA transfer is possible by adding the selector 310, etc. and utilizing effectively the hardware resources of a CPU.</p> |
