发明名称 ADDRESS BUFFER CIRCUIT
摘要 PURPOSE:To prevent the generation of a malfunction of an address buffer circuit due to the rock of an earth potential by controlling the potential of a node which is precharged by the source current supplied from a depression type FET that is controlled through a gate by the potential of the remote side. CONSTITUTION:The source currents supplied from depression type FETQ11 and Q10 whose gates are controlled by the potential of the remote side with each other flow to the precharge nodes NA and NA' at the sides of an input address signal level VAi and an internal reference potential level VRef. Thus the precharge potential is controlled and the difference of gate potentials which control FETQ1 and Q2 constituting an FF is increased. As a result, a stable address decoding output is produced despite the deflection of an earth potential. This prevents a malfunction of an address buffer circuit due to the rock of the earth potential.
申请公布号 JPS60234294(A) 申请公布日期 1985.11.20
申请号 JP19840090385 申请日期 1984.05.07
申请人 NIPPON DENKI KK 发明人 SHIMIZU TAMIO
分类号 G11C11/413;G11C11/34;G11C11/408;(IPC1-7):G11C11/34 主分类号 G11C11/413
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