Signal format detection circuit for digital radio paging receiver

摘要

A signal detection circuit for a digital radio paging receiver is provided for successfully detecting a desired signal. A demodulated carrier wave, modulated with a code having n bits, is written into an n-stage shift register in response to a clock pulse of frequency fs. The output stages of the shift register are scanned in response to a scan signal of frequency nfs in order to provide an output. The output is dependent on the coincidence of the shift register outputs with a predetermined code and is used to enable an address detector circuit which compares a received signal to the desired signal stored in a PROM.