发明名称 RESET CIRCUIT
摘要 <p>PURPOSE:To prevent a memory from the input of incorrect data and to improve the reliability of a reset circuit by protecting the stored contents of the memory on the basis of a detecting signal from a detecting means at the interruption of a power supply and resetting a central processor by a delay signal from a delay means. CONSTITUTION:When the voltage VDD of a DC power supply is lowered, the voltage on both the sides of a resistor R45 is lowered, a TR Tr1 is turned off and the stored contents of the memory 32 is protected. When the voltage VDD is lowered moreover, the voltage on both the sides of a serial circuit consisting of resistors R45, R46 is lowered less than the threshold voltage of a TR Tr2, the TR Tr2 is turned off and a CPU31 is reset. Thus, the CPU31 is reset after protecting the stored contents of the memory at first, so that the memory can be prevented from the input of incorrect data.</p>
申请公布号 JPS60231225(A) 申请公布日期 1985.11.16
申请号 JP19840088603 申请日期 1984.05.01
申请人 MATSUSHITA DENKO KK 发明人 NIIYA HIROSHI
分类号 G06F12/16;G06F1/00;G06F1/24 主分类号 G06F12/16
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