| 摘要 |
PURPOSE:To make it possible to control threshold voltages independently without increasing mask processes, by separating an impurity-ion implanting process for adjusting the threshold voltages of a high-withstand-voltage MIS transistor and a standard-withstand-voltage MIS transistor. CONSTITUTION:On an n type silicon substrate 11, n<+> type and p<+> type channel stoppers 13 and 14, a field oxide film 15 and a p<-> type well region 12, on which an n-MOS transistor (Tr) is formed, are formed. A region A1 is the region, where a standard-withstand-voltage MOSTr(p-Tr) is formed. A region A2 is the region, where a high-withstand-voltage MOSTr(Hp-Tr) is formed. A region A3 is the region, where a high-withstand-voltage high-resistance element (Hp-R) is formed. By using a mask 51, boron implanted region B1 and B2 for adjusting the threshold voltages of (Hp-Tr) and for forming the low concentration region are formed. By using a mask 52, implanted regions B3 and B4 for adjusting the threshold voltage of p-Tr and for forming the high resistance layer are formed. By using a mask 53, a boron implanting region B5 for forming the p<+> type drain and source regions of p-Tr and Hp-Tr and the p<+> type contact region of Hp-R is formed. |
