| 摘要 |
<p>PURPOSE:To reduce the resistance of a gate and to improve a noise index in a semiconductor device having an FET structure, by arranging a plurality of gate- potential supplying electrodes in a region on the side of a source electrode and a region including the side of a drain electrode. CONSTITUTION:On a compound semiconductor substrate 10, a source electrode 12 and a drain electrode 13 are arranged so as to hold a gate electrode 11 and connected to a source region 16 and a drain region 17 electrically. Feeding points Pa and Pb in the vicinity of both ends of the gate electrode 11 are electrically connected to a gate potential supplying electrodes (gate pads) 14a and 14b of a pattern, which is surrounded by the source electrode 12. A feeding point Pc at the center is connected to a gate pad 14c, which is arranged in the region on the side of the drain electrode 13. The feeding points to the gate electrode are increased without increasing the size of a chip and without using a complicated structure such as multilayer wirings, and the resistance of the gate can be reduced.</p> |
