| 摘要 |
PURPOSE:To speed up pipe-line processing by fetching both jumped addresses in advance when an advance fetch instruction is a branch instruction as the result of decision whether the advance fetch instruction is the branch instruction or not. CONSTITUTION:A central processor 2 reads out a program from a main storage part 3 and decodes the read-out program to decides whether a common bus 1 is to be used or not. Since the common bus 1 is made free when the common bus 1 is not used, the program is fetched in advance and the fetched program is stacked in an instruction fetching queue 22. If a branch instruction supervisory part 23 detects that the stacked instruction is a branch one, jump addresses after the execution of the branch instruction are saved in a free instruction fetch pointer 25 e.g. out of the pointers 25, 26, jump addresses corresponding to the number of bytes specified by a specification part 24 are fetched, and then the pointer is switched to the branch fetch pointer 25 side to save the specified number of bytes. When the branch instruction is a real one, an instruction fetch queue part 22 is advanced by the specified value from the specification part 24 and the excessive instructions are removed.
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