发明名称 MODE CHANGEOVER CONTROLLING SYSTEM IN PLURAL PROCESSOR SYSTEMS
摘要 PURPOSE:To select dynamically a processor unit which can switch a mode, by inserting a switching circuit into the pre-stage of a mode flip-flop whose mode is set by the processor unit. CONSTITUTION:A NOR gate 32 gains an OR condition of a mode changeover control signal outputted from a processor unit A and a mode changeover control signal outputted from a processor unit B, and supplies it to a clock input terminal of a mode flip-flop 31. An AND gate 33 gains an AND condition of a mode changeover control signal outputted from the processor unit B and a signal which has inverted an output of a switch 35 by an invertor 34, and supplies it to one input terminal of the NOR gate 32. The switch 35 selects to permit the mode changeover by both the processor units A, B, or to inhibit the mode changeover by the processor unit A.
申请公布号 JPS60230259(A) 申请公布日期 1985.11.15
申请号 JP19840086340 申请日期 1984.04.28
申请人 TOSHIBA KK 发明人 SANADA TSUTOMU
分类号 G06F15/16;G06F15/177 主分类号 G06F15/16
代理机构 代理人
主权项
地址
您可能感兴趣的专利