| 摘要 |
PURPOSE:To make it possible to perform a digital pattern test requiring pattern coincidence wait control at a high speed, by providing a pattern generation part, a comparator, a counter and a control circuit. CONSTITUTION:A comparator 17 compares the reference pattern sent out from reference memory 12 with the response pattern outputted from an object 3 to be inspected to detect the presence or absence of the coincidence of both patterns and sends out the result to a control circuit 18. When both patterns coincide with each other, the circuit 18 sends a coincidence detection status to a pattern control part 20 to complete processing. At the time of non-coincidence, one count is subtracted from the set value of a pattern coincidence wait counter 19. When the value of the counter 19 is zero, the circuit 18 sends a pattern non- coincidence detection impossible status to the control part 20 to complete the processing thereof. Further, when the value of the counter 19 is not zero, a right response pattern is obtained and a test pattern is sent out to an object 30 to be inspected from the output memory 11 of the pattern generation part 10 until a count value comes to zero while a reference pattern is sent out to the comparator 17 from the reference memory 12. Therefore, the acceleration of a processing speed is achieved.
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