| 摘要 |
PURPOSE:To fine the pitch width of a memory cell and memory itself by forming a wiring for a power supply onto an insulating film coating the wiring and connecting the wiring to a source in a CMOS inverter and a bias region in a substrate region in the CMOS inverter. CONSTITUTION:Gate electrodes 57 are formed by polycrystalline silicon containing a conductive impurity, and a wiring is shaped by polycrystalling silicon 60 containing the conductive impurity formed on an insulating film 59 coating the gate electrodes while a metal is interposed in contact holes 62 bored to said insulating film connecting the wiring and drain regions 55. Accordingly, the metallic wiring as one power supply is shaped on the insulating film 59, and the wiring can be connected to both of a source in one CMOS inverter and a reverse conduction type diffusion region biassing a substrate region in the CMOS inverter through the contact holes. |
