| 摘要 |
PURPOSE:To attain programming of another independent logical circuit to an area not in use when a logical circuit having a low gate operating rate is programmed by dividing an area of a product term line into plural numbers. CONSTITUTION:In dividing an area of a field programmable logic array (FPLA) into two, the product term 4 is divided into areas (a), (b) and the product term line of each area is connected to collectors of area selecting transistors (TRs) (c), (c)... and (d), (d).... Emitter of the TRs (c), (d) are grounded and bases are connected to area selection signals (e), (f). If a desired logical circuit is not realized by the area (a) only, the area selection signals (e), (f) are brought into logical ''1'' so as to use the area a, b selectively. When the desired logical circuit is realized by the area (a) only, only the area (a) is programmed. Another logical circuit is programmed to the area (b) not in use and the area (a) or (b) is used selectively by the area selection signals (e), (f). In using the areas (a), (b) dividedly, the signals (e), (f) are clamped into logical ''0'' or ''1'' so as to realize the logical circuit having the other function. |
