发明名称 Circuit and process for chrominance decoding with analog or digital delay line in a television system of a pal or secam type
摘要 The present invention provides a matching circuit for connecting a chrominance decoding integrated circuit normally connected by terminals to a conventional analog delay line so as to make it compatible with a digital delay line. This matching circuit comprises a switch connecting alternately each of the outputs of the integrated circuit to an analog-digital convertor connected to a digital delay line, to a digital-analog convertor, then to a switch routing the signal alternately to each of the two summators whose other inputs receive directly the output of the integrated circuit. The summators supply then respectively the chrominance signals R-Y and B-Y.
申请公布号 US4553156(A) 申请公布日期 1985.11.12
申请号 US19830559607 申请日期 1983.12.08
申请人 THOMSON-CSF 发明人 DOUZIECH, PATRICK;IMBERT, MICHEL
分类号 H04N9/66;H04N9/64;(IPC1-7):H04N9/47 主分类号 H04N9/66
代理机构 代理人
主权项
地址