发明名称 Decoupling apparatus for verification of a processor independent from an associated data processing system
摘要 In a data processing system having a plurality of CPUs, each CPU is operatively connected to other portions of the data processing system through a system interface unit. The CPU includes a cache memory, an execution unit, and a control unit. Further, each CPU includes an apparatus for verifying the operability of the CPU independent from the operation of the data processing system, which comprises a switch element, interposed between a first port of the CPU and the system interface unit, for decoupling the CPU from said system interface unit in response to a decoupling control signal. A detecting element, detects whether the CPU and the system interface unit are operatively connected to generate a configuration signal indicating the status of the operative connection. A maintenance panel is connected to the switch element and to the detecting element via a second CPU port. The maintenance panel includes logic to control the decoupling of the CPU from the system interface unit, control logic to cause the CPU to execute test sequences, and analyzing logic to check the results of the test sequences to verify whether the CPU is functioning correctly.
申请公布号 US4553201(A) 申请公布日期 1985.11.12
申请号 US19830479790 申请日期 1983.03.28
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 POLLACK, JR., FRANK S.
分类号 G06F11/22;(IPC1-7):G06F11/22;G06F9/22 主分类号 G06F11/22
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