| 摘要 |
A driver circuit directly couples the clock signal to gate electrodes of pull-up devices to minimize the loading effect on the clock signal. The pull-up devices pull up the output to substantially the positive power supply voltage. The clock signal is coupled to the gate electrodes of the pull-up devices by a transistor whose gate electrode is controlled by a control signal. The control signal also triggers the pull down of the gate electrode of the pull-up devices when it is not desired to couple the clock signal to the gate electrode of the pull-up devices.
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