发明名称 FRAME SYNCHRONIZING DEVICE
摘要 PURPOSE:To use a frame aligner in common by using a selector circuit comprising an OR circuit, AND circuit and an inverting circuit. CONSTITUTION:Frame synchronizing signals c, d outputted from a frame and multi-frame synchronizing circuit 3 are inputted to an AND circuit 4 and the frame synchronizing signal (d) is inverted by the inverting circuit 6 and inputted to the AND circuit 4'. Then the output of the AND circuits 4, 4' is inputted to the OR circuit 5 and its output is inputted to an input terminal of the frame aligner 7. Furthermore, a frame synchronizing signal (e) in the device is inputted to the other input terminal of the frame aligner 7 and a data multi-frame synchronizing signal (f) is outputted with synchronization.
申请公布号 JPS60226241(A) 申请公布日期 1985.11.11
申请号 JP19840083548 申请日期 1984.04.24
申请人 NIPPON DENKI KK 发明人 YAMASHITA MIKIO
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
代理机构 代理人
主权项
地址