| 摘要 |
PURPOSE:To change the pulse width during operation by providing plural pulse width forming circuits and allowing a selection circuit to select the circuits. CONSTITUTION:A circuit consisting of gates 201, 202 and a delay circuit 205 is the 1st pulse width forming circuit, and a circuit comprising gates 201, 203 and a delay circuit 206 is the 2nd pulse forming circuit. These circuits are selected by an output of a gate 204 and when logical ''1'' is inputted as a selection signal on a signal line 214, the 1st pulse width forming circuit is selected and a pulse having a pulse width of the total W1 of delay times of the gates 201, 202 and the delay element 205 to an output line 208. On the other hand, when logical ''0'' is inputted as the selection signal, the 2nd pulse width forming circuit is selected, and a pulse having the pulse width of total W2 of delay times of the gates 201, 203 and the delay element 206 is outputted to the output line 208. |
