发明名称 MASTERSLICE TYPE INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To lower the power supply noise by method wherein an element filling the role of output current damper is arranged at an output end of buffer circuit so that a wiring may select if this element is serviceable to a damper or not. CONSTITUTION:Multiple pads P are arranged on the periphery of a semiconductor chip 1 while regions B for input and output circuits are arranged for each pad P. Besides an output circuit and an input circuit are arranged in the regions B while an output buffer is arranged in the output circuit. The number of regions B arranged on the periphery of one chip is equivalent to or around 10 each less than the number of case pins. Resistor R2 filling the role of damper provided with three contacts C1, C2 and C3 can make applicable value minimum (almost zero) or maximum by means of selecting if the element is serviceable to damper or not by the way of forming the first layer metallic wiring M. Further in case the element is serviceable to damper, any resistance value optimum for the circuit may be selected.
申请公布号 JPS60226139(A) 申请公布日期 1985.11.11
申请号 JP19840083112 申请日期 1984.04.25
申请人 NIPPON DENKI KK 发明人 ITOU SOUICHI
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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