发明名称 DEBUGGING DEVICE
摘要 PURPOSE:To raise the degree of freedom of an interruption by making a CPU read an operation code of a software interruption, when an address bus coincides with a latch output of a break point, in case the CPU reads a data from a memory. CONSTITUTION:When a coincidence signal of a comparator 5 for always comparing a break point address and an address bus is active, an AND circuit 6 becomes active. Also, a data bus buffer 1 and a buffer 2 become disable and enable, respectively, an operation code 3 of a software interruption set in advance appears on a data bus, a CPU reads this data, and it is stored in an operation code fetch buffer in the CPU. Thereafter, when the operation code of a software interruption of this break point is executed, an interruption is generated.
申请公布号 JPS60225948(A) 申请公布日期 1985.11.11
申请号 JP19840083399 申请日期 1984.04.24
申请人 MATSUSHITA DENKO KK 发明人 OONO MASAMI
分类号 G06F11/28;G06F9/38;G06F11/36 主分类号 G06F11/28
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