发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To perform processings with the same precision and the same number of multiplications as an arithmetic unit constituted with symmetrical coefficients, by providing a storage circuit, where multiplication results are stored, and reading out its contents on demand in an arithmetic unit constituted with asymmetrical coefficients. CONSTITUTION:A sampling frequency converting circuit consists of digital filters 29 and 30 having asymmetrical coefficients, a changeover switch 31, and a memory 32. The products between data xn of digital filters and coefficients CR are stored in this memory 32. Required products are read out from the memory 32, and only addition is performed with convoluting calculation. Thus, processings are performed with the same precision and the same number of multiplications as the arithmetic unit constituted with symmetrical coefficients.
申请公布号 JPS60224316(A) 申请公布日期 1985.11.08
申请号 JP19840080182 申请日期 1984.04.23
申请人 HITACHI SEISAKUSHO KK 发明人 NAKAMURA MASAFUMI;TAKEUCHI TAKASHI;NODA TSUTOMU;NAKAI NOBUO
分类号 H03H17/00;G06F17/10;H03H17/02 主分类号 H03H17/00
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