| 摘要 |
<p>PURPOSE:To suppress an impulsive noise mixed into an input signal by providing a change point detecting circuit which detects rise and fall points of the input signal with a signal obtained by delaying the reception data input signal successively. CONSTITUTION:An oscillator 2 generates a clock signal 3 having a frequency higher than the fundamental frequency of a data input signal 1 and supplies this signal 3 to a shift register SR20, a change point detecting circuit 6, and a counter 4. The SR20 consists of plural stages of shift registers and delays and transfers the input signal 1 successively and inputs the signal to the circuit 6. The circuit 6 uses the output of the SR20 to detect the rise point and the fall point of pulses having a certain width or wider in the data input signal and resets the counter 4, which counts the high-speed clock signal 3, by a detection signal 7, and a clock signal 5 having the same period as the fundamental frequency of the input signal 1 is outputted from the counter 4. In a discriminator 8, the signal 1 is discriminated by the signal 5 to reproduce reception data.</p> |
