| 摘要 |
PURPOSE:To make sure set and reset operations possible by inserting a resistance between the common emitter point of data holding transistors TRs and that of TRs for set signal input and reset signal input. CONSTITUTION:When a high level is impressed to a reset input R, a bias voltage is impressed to the base-emitter junction of a reset input TRQ1 extra by the potential difference of a resistance R5. Therefore, the TRQ1 is turned on more easily than a data holding TRQ3, and sure reset is possible. Frequency characteristics are not degraded because a resistance is not inserted to the feedback route of the signal. Further, the output logical level is not shifted neither reduced because level shift is not performed in the VCC side. Consequently, sure set and reset operations are attained. |
