| 摘要 |
PURPOSE:To decrease the occupied area of both capacitors by providing an adjusting circuit adjusting a voltage applied to a capacitor for extracting a charge so as to be smaller at all times than a voltage applied to a capacitor for storing a charge. CONSTITUTION:A potential V1 of a node 5 is expressed approximately in Equation I, where gm<1>, gm<2> are conductances of transistors (TRs) 7, 11 and K is a back bias effect coefficient of the TR11. In selecting the gm<1> smaller than the gm<2>, the K is nearly 0.2 so as to decrease the difference between V0 and V1. When a transfer gate 4 is closed, a gate 3 is opened and the charge stored in the capacitor 2 is discharged. The charge stored in a capacitor 1 is discharged gradually by repeating the operation above. The potential of the node 8 is adjusted so as to be decreased automatically in response to the decrease in the potential of the node 5 and the voltage fed to the capacitor 2 is kept always smaller than the voltage fed to the capacitor 1.
|
