发明名称 CONTROL METHOD OF AUTOMATIC ERASING OPERATION
摘要 PURPOSE:To prevent malfunction by preventing a write succession point and the lost head part of next write data from overlapping each other by setting issue timing points of an automatic erasing operation start instruction on the basis of a defect stand-by instruction and using them selectively. CONSTITUTION:When a controller 2 detects a corresponding track, a CPU1 reads defect information on the track and when the number of defects is 0, the CPU generates an automatic erasure intruction at normal timing T0 after writing or reading final data and escapes from the charge of control. When the number of defects is 1, the CPU generates the automatic erasure instruction at timing corresponding to T1>=td1+tc+T0 obtained by adding time td1 corresponding to the width of a defect area and the width tc of a count part and leaves the charge of control. When the number of defects is >=2, the automatic erasure instruction is generated at timing corresponding to Tn>=td1+td2+...+tdn+ntc+ T0 provided that the time for >=2 defect areas is td2+...+tdn.
申请公布号 JPS60222923(A) 申请公布日期 1985.11.07
申请号 JP19840079478 申请日期 1984.04.20
申请人 FUJITSU KK 发明人 MATOBA TATSUO;KURIHARA YASUO
分类号 G06F3/06;G11B5/024;G11B20/10 主分类号 G06F3/06
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