| 摘要 |
PURPOSE:To eliminate the need to divide the edge detection pulse width of an input signal accurately into half by using two flip-flops and two switch circuits controlled by the outputs of said flip-flos to constitute a phase comprator. CONSTITUTION:If an input I is synchronized correctly with a clock C time coincidence is secured between the rise edge of the input I and the rise edge of the clock C. Thus the positive voltage pulse width is equal to the negative voltage pulse width is equal to the negative voltage pulse width of the output P of a phase compratator 5. These pulse widths are integrated by an LPF2, and the voltage of a fixed level is obtained. Then a voltage control oscillator 3 has oscillations with a fixed frequency, and the output of the oscillator 3 is divided correctly by a a frequency divider 4. Thus a correctly phase locked clock C is delivered. |
