| 摘要 |
A laminate for a laminated multilayer circuit board incorporates as a constituent member the plating layer from a peel-apart temporary base used in the fabrication of the laminate. The layer, with its one surface superimposed on the base, has additively plated to its opposite surface individual conductors and is subsequently personalized in register with the pattern of the plated conductor circuitry. The personalized layer and the plated conductors are embedded in a dielectric layer, the superimposed surface being flush mounted in the dielectric layer. The base has a rough-like surface profile characteristic that imparts at least a conformal surface profile characteristic in the superimposed surface of the plating layer which in turn provides improved adherence of this superimposed flush mounted surface, when subsequently exposed by the removal of the peel-apart base, to another dielectric layer thereafter laminated to the embedding dielectric layer to inhibit delamination between the two dielectric layers. Preferably, the base also imparts a conformal profile surface characteristic either to the plating surface to improve the plating bond between the plating layer and conductors, and/or to the laminating surface of the embedding dielectric layer to improve the lamination bond between the two dielectric layers, which combine with the conformal characteristic of the plating layer's flush mounted surface to inhibit synergistically delamination between the two dielectric layers. |
