| 摘要 |
PURPOSE:To detect an address decoding error within a memory IC without increasing the hardware quantity by using effectively an idle area of the memory IC. CONSTITUTION:The 4-bit address signals A0, A1, A2 and A3 and parity signals P corresponding to signals A0-A3 are used to supply an access to a memory IC1. Such addresses where said address and parity signals are equal to odd parities are effective. While the addresses other than said effective addresses are all ineffective. Read data D0-D2 and an error bit E are read out of the IC1, and data D0-D2 are taken outside. Here many idle terminals are produced excepting address and bit signal terminals corresponding to signals A0-A3 and data D0-D2. Therefore the signal P and the bit E utilize such idle terminals. |
