摘要 |
PURPOSE:To follow up a wide-range input by controlling a VCO with a voltage obtained by adding the output of a loop filter and a bias control signal from the external. CONSTITUTION:An input signal (a) is inputted to a phase comparator PC1 and a synchronous detecting circuit 6. The PC1 compares the phase of the signal (a) with that of an output signal (e) from a frequency divider 4 and inputs the output to a bias adding circuit 5 after allowing this output to pass an LPF2. The circuit 6 detects step-out of synchronism between signals (a) and (e) and inputs a detection signal l to a bias control circuit 7. The circuit 7 to which the signal lis inputted generates a bias control signal (k) and inputs it to the circuit 5. The circuit 5 controls a VCO3 by a signal (c) resulting from addition of signals (j) and (k), and the signal (e) obtained by dividing an output signal (d) of the VCO3 by the frequency divider 4 is inputted to the PC1, thus constituting a PLL circuit. If the output frequency of the VCO3 is lower than the input frequency, the circuit 7 raises the bias voltage to raise the output frequency of the VCO; but otherwise, the circuit 7 reduces the bias voltage to approximate the input frequency and the frequency of the VCO to each other. |