| 摘要 |
PURPOSE:To realize a high withstand voltage, high-speed device by a method wherein an Si substrate is provided with a shallow and deep recesses filled with magnesian spinel, P layer, and N layer and polishing is accomplished for the formation of devices opposite to each other in the type of conductivity in the two recesses. CONSTITUTION:An Si substrate 1 is provided with approximately 30mum-deep and 50mum- deep recesses to be convered by an epitaxially grown single-crystal magnesian spinel layer 4. Single-crystal Si is allowed to grow in a gaseous mixture of H2 and silane. After this, another single-crystal Si layer is allowed to be formed from SiCl4 in H2 until the recesses are filled. Impurity density in a P1 layer 5 and P2 layer 6 is aproximately 10<18> an 10<15>/cm<2>, respectively, and that in a N1 layer 7 and N2 layer 8 is 10<18> and 10<15>/cm<2>, respectively. A process follows wherein chemical polishing is accomplished for the exposure of the P2 layer 6 in the shallow recess and of the N2 layer 8 in the deep recess for the final stage of building semiconductor devices, a P-N-P type in the shallow recess and an N-P-N type in the deep recess. This constitution allows an N type and P type Si layers of given impurity concentration or thickness to be formed on one and same subsrate, realizing high withstand voltage, high-speed devices on the same substrate. |
