Functionally redundant logic network architectures

摘要

A logic gate structure having functionally redundant architecture for enhanced production yields and reliability comprises a plurality of two-input nodes at least some of which may be programmed by control states for changing the logical function of the gate structure. Redundancy is provided by gate structure implementations in which the number of possible control states exceed the number of logic functions expected of the gate structure. Redundancy increases the probability of gate structure operation despite logic faults and renders the gate structure suitable for use in adaptable problem solving machines such as robots and pattern recognition apparatus. A number of embodiments are disclosed including three and four input variable networks. Some such embodiments include selected architectural simplifications wherein certain nodes in a network are either logically fixed or entirely omitted to reduce the number of control lines.