发明名称 PROCESSOR CALLING SYSTEM
摘要 PURPOSE:To discriminate the own processor from other processors only with an address part by using an address code inhibited at a normal branch instruction for the interruption start control to call the other processors. CONSTITUTION:A branch destination address calculated is subject to 2-byte boundary limitation, the least significant bit is zero normally, the level of a signal line 311 is ''0'', then the level of a signal line 312 is ''0''. Then a gate 36 is activated in this case, a branching indication signal 310 is logical 1 by a signal line 307 at the establishment of branch condition from a branch condition decision circuit 32, the branching to a branch address 309 is started and branched into the same processor as the processor where the branch instruction is executed. When the signal line 311 is ''1'', the level of the signal line 312 is ''1'', a gate 36 is shut and the gate 37 is activated. When the branch condition is established in this case, the level of a processor interruption indication signal 313 is energized to logical 1 via the signal line 307 and the call interruption to the other processor is started.
申请公布号 JPS60217451(A) 申请公布日期 1985.10.31
申请号 JP19840073446 申请日期 1984.04.12
申请人 NIPPON DENKI KK 发明人 IZUMISAWA HIROYUKI
分类号 G06F9/46;G06F15/17 主分类号 G06F9/46
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