| 摘要 |
PURPOSE:To perform conversion into a real address of a real computer from a virtual address in the same processing time as that required for a bear machine, by using the same adder to perform simultaneously the addition of logical addresses of a virtual computer system and the addition of start addresses of a virtual resident computer system. CONSTITUTION:A logical address register 11 stores a virtual address, and this virtual address includes a segment index SX, a paging index PX and a byte index BX. The index SX, a segment table origin STO stored in a segment table origin register 12 and the contents alpha of a start address register 13 of a virtual resident computer are added simultaneously by a 3-input adder 31-1. Then qualification prefix conversion circuits 32-1-32-3 performs conversion successively to obtain a real address of a real computer corresponding to the virtual address stored in the register 11. This real address is stored to a real address register 22. |
