发明名称 FREQUENCY SYNTHESIZER
摘要 PURPOSE:To attain low power consumption by correcting the change in a control voltage to a VCO at PLL loop disconnection and executing intermittently the PLL operation in a PLL frequency synthesizer. CONSTITUTION:When the loop cut-off switch 310 is turned off by a control signal from a loop cut-off controller 316, a change is produced to a control voltage to the VCO301. Then a correcting signal is formed based on an output signal of a triangle wave generating circuit 312 and injected to a loop filter 309 via a correction signal injecting switch 311. Thus, a corrected control voltage is fed to the VCO301 from the loop filter 309. On the other hand, when the switch 310 is turned off, the power supply to a prescaler 303, a TCXO307 and a PLL LSI 317 is stopped. The PLL operation is executed intermittently by the interruption of the power supply. Thus, low power consumption is attained.
申请公布号 JPS60214118(A) 申请公布日期 1985.10.26
申请号 JP19840070204 申请日期 1984.04.09
申请人 MATSUSHITA DENKI SANGYO KK 发明人 OOBA MOTOI;MAKIMOTO MITSUO;YAMASHITA SADAHIKO
分类号 H03L7/18;H03L7/08;H03L7/199;H04B1/16;H04B1/26 主分类号 H03L7/18
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