| 摘要 |
PURPOSE:To reduce the cost of a simultaneous measuring device by putting some of execution steps of a test program in charge of hardware, and thus reducing the scale of a program memory and simplifying the test program. CONSTITUTION:A logical pattern stored in the program memory 1 is applied to integrated circuits IC1, IC2, and IC3, and when their outputs enter a predetermined coincidence state, a coincidence detecting circuit 2 stops the application of following logical patterns individually through a pattern application inhibiting circuit 4. When outputs of all integrated circuits enter the predetermined coincidence state, the pattern application inhibiting circuit 4 resets the inhibition and a logical pattern for a practical logical function test is applied from the program memory 1 to integrated circuits. Further, the application inhibition of the logical pattern is reset and a logical test is taken even if a timer 3 enters a count-up state after a specific time longer than the time when respective integrated circuits enter the predetermined coincidence state. |
