发明名称 CONTROL SYSTEM FOR SYNCHRONIZING BURST TRANSMISSION PHASE
摘要 PURPOSE:To shorten the time when a synchronizing burst is synchronized with a synchronizing window by limiting the weighting and threshold value decision processing of each symbol to a part corresponding to the rear area of a metatic pattern after the synchronizing burst enters a normal synchronism state. CONSTITUTION:Threshold value decision circuits 27-1-27-m2 corresponding to respective symbols output m2 ternary identification values to a symbol timing decision circuit 28; and the time position of the metric pattern is detected in the rear area and specific reference symbol length and time variation are extracted to output a corresponding error voltage as a phase error voltage. This voltage is sent to a metric pattern phase controller to control the phase of the synchronizing burst signal generated by a synchronizing burst generating circuit, thus making an adjustment so that the phase error voltage is zero. Consequently, a time-division multiaccess TDMA frame is generated and maintained.
申请公布号 JPS60214643(A) 申请公布日期 1985.10.26
申请号 JP19840071268 申请日期 1984.04.10
申请人 NIPPON DENKI KK 发明人 HOTSUTA TOSHITSUNE
分类号 H04J3/00;H04B7/15;H04B7/204;H04B7/212 主分类号 H04J3/00
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