| 摘要 |
PURPOSE:To decrease the converting delay time by storing data of a specific channel of a multiplex serial form to the 1st memory, reading the data in a burst way and applying prescribed converting processing, storing it in the 2nd memory and reading it. CONSTITUTION:A counter CRT1 designates a write address to a memory MEM1, gives a write command to a selector SEL1, writes a specific channel CH on the MEM1 sequentially, confirms the final m-th specific CH data inputted to the MEM1, reads the 1st m-th specific CH data in a burst way and applies a prescribed converting processing by a read processing circuit PRO. A counter CTR2 designates an address to a memory MEM2, writes the specific CH data on the MEM2 finished for processing via a selector SEL2, starts reading at the transmission point of time of the 1st specific CH of the next frame and transmits the processed data via the selector SEL. Thus, the delay time required for two frames in conventional systems is decreased to that of one frame's share. |
