发明名称 FREQUENCY SYNTHESIZER
摘要 PURPOSE:To attain low power consumption by correcting a change of a control voltage to a VCO at PLL loop cut-off and executing intermittently the PLL operation in a PLL frequency synthesizer. CONSTITUTION:When a loop cut-off switch 311 is turned off by a control signal from a loop cut-off controller 314, the control voltage from a loop filter 310 is fed to an operational amplifier 312. The control voltage is changed when the switch 311 is turned off. Then an output of a ramp signal generator 313 is fed to the operational amplifier so as to correct the change in the control voltage and the result is fed as the control voltage to the VCO301. On the other hand, when the switch 311 is turned off, the power supply to a prescaler 304, a TCXO 308 and a PLL LSI 315 is stopped. The PLL operation is executed intermittently by the interruption of the power supply. Thus, low power consumption is attained.
申请公布号 JPS60214117(A) 申请公布日期 1985.10.26
申请号 JP19840070203 申请日期 1984.04.09
申请人 MATSUSHITA DENKI SANGYO KK 发明人 OOBA MOTOI;MAKIMOTO MITSUO;YAMASHITA SADAHIKO
分类号 H03L7/18;H03L7/08;H03L7/199;H04B1/16;H04B1/26 主分类号 H03L7/18
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