发明名称 PCM OUTPUT CIRCUIT
摘要 PURPOSE:To attain ease of listening of information by applying limiter (amplitude limit) to an output level in response to the state of an error rate so as to decrease a noise level thereby decreasing the noise of a voice output including a pulsative noise at deterioration of the error rate. CONSTITUTION:A digital signal 1 outputted from a demodulation circuit is inputted to a synchronizing signal circuit 2. An analog output signal 7 is obtained via a de-interleave circuit 3, a data error detection and correction circuit 4, a data output circuit 5 and a DA converting circuit 6. An amplitude limit circuit 15 controls dividingly a region of a predetermined amplitude and the amplitude of the output of the DA converting circuit 6 is limited at the analog level. An error rate detection circuit 16 takes the detecting rate of a synchronizing signal of a synchronizing signal detecting circuit 2 as the error rate and controls the level of the amplitude limit circit 15 in response to the detection rate.
申请公布号 JPS60214475(A) 申请公布日期 1985.10.26
申请号 JP19840070827 申请日期 1984.04.11
申请人 HITACHI SEISAKUSHO KK 发明人 TANAKA HIROMICHI;NISHIMURA KEIZOU
分类号 G11B20/10;G11B20/18 主分类号 G11B20/10
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