| 摘要 |
PURPOSE:To inhibit the extension of impurity regions in source and drain regions in both a P channel MOS transistor and an N channel MOS transistor by forming low resistance layers on the source and drain regions and gate electrodes in both of the transistors while the height of barriers to a semiconductor substrate of these low resistance layers is each brought to specific values or less. CONSTITUTION:Low resistance layers are formed on each source-drain region and gate electrode in the transistors of an N channel MOS transistor Tn and a P channel MOS transistor Tp, and the height of barriers to a substrate of these low resistance layers is brought to 0.550eV or less. Since low impurity regions 8a, 8b, 9a, 9b as one parts of the source-drain regions in several transistor Tn, Tp are shaped adjacently under the gate electrodes 6, 7, electric fields generated in the vicinity of the drain regions are dispersed when voltage is applied to separate drain region 8b, 9b, and impact ionization can be controlled while the extension of the low impurity regions 8b, 9b is limited to 0.05-0.1mum. |
