INTEGRATED CIRCUIT FOR WRITING, READING AND ERASING MEMORY MATRIXES COMPOSED OF INSULATED-LAYER FIELD-EFFECT TRANSISTORS

摘要

A memory access and control circuit is described for use with a non-volatile memory matrix utilizing insulated gate field effect transistors. Two one out of n selector circuits which are complementary in operation and which are formed from transistors of opposite conductivity type are formed on an integrated circuit and transistors of one conductivity type are formed in insulating islands in the substrate.