| 摘要 |
PURPOSE:To absorb potential variation by forming one electrode of a capacitance and a wiring layer by a metal having the high melting point and low resistance or a silicide of a metal and silicon or shaping a plurality of metallic wirings on a wiring layer connected to one electrode of the capacitance and connecting a plurality of the metallic wirings to a wiring connected to one electrode of the capacitance. CONSTITUTION:One electrode of a capacitance and a wiring layer connected to the electrode are formed by a high melting-point metal, such as Mo, W, Ta, Nb, Ti, etc. or a silicide of these high melting-point metals and silicon. An insulating film is shaped on the array of a memory cell to insulate these electrode and wiring layer, and a metallic wiring 73 is formed. The metallic wiring 73 is connected to other electrodes and wiring layers connected to other electrodes through contact windows 74. The metallic wiring 73 is also shaped by a high melting-point metal or a silicide of the metal, and coated with an inter-layer insulating film, and a word line is wired on the inter-layer insulating film. Accordingly, when the layer of the metallic wiring 73 and the layer of the word line are made different, the metallic wiring is not subjected to restriction in which it is passed only among cell arrays, wiring resistance is lowered, the transmission of noises is reduced, and reliability can be improved. |
