SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PURPOSE:To reduce the dependence of a delay circuit in a semiconductor IC device upon a supply voltage by actuating a CMOS delay circuit under a bias voltage which cancels a variation of the supply voltage. CONSTITUTION:A P type MOSFETQ4 and an N type MOSFETQ5, Q6 are serially connected between a supply voltage VCC and the earth, whereby a bias circuit is formed, and a bias voltage for canceling a variance of the voltage VCC occurs. This bias voltage controls a P type CMOS delay circuit of a semiconductor IC device, Q-type MOSFETQ1 and Q2 and an N type MOSFETQ3 of a constant current source serially connected, whereby a temperature dependence of the CMOS delay circuit for delaying rise, etc., of an input phiin can be reduced. Accordingly charging and discharging periods of a capacitor due to a delay output is kept constant irrespective of the variation of the supply voltage. As a result, a series of time series action timing signals such as the dynamic RAM can be formed with the necessary minimum margin, and a stable high-speed acting cycle can be executed.