| 摘要 |
PURPOSE:To detect a fault even when any of programs is failed by constituting a counter in a watchdog timer to reset while all programs operated in an information processing unit are operated normally. CONSTITUTION:A monitor program sets periodically an FF10 and task programs 1-4 set periodically FF11-14 respectively. When the monitor and task programs are operated normally, no overflow of a counter 30 is caused. If some of the monitor program and the task programs 1-4 is failed, any of the corresponding FF10-14 is not set, an output signal of an AND circuit 20 does not go to ''1'' and the counter 30 is not reset. Thus, the overflow of the counter 30 is generated, an error display circuit 40 is driven and the error display is attained. |
